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FeMiPulse I. FPGA-based pulse programmer. Programming interface: TCP-IP. Fully integrated into SpecMan4EPR.
16384 delays with 2ns-32ms duration, 16 outputs, 1 level of cycles, 64k repetitions. Built-in hardware timing protection circuitry for magnetic resonance pulse outputs and programmable clock output.
Variety of front-ends.
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FeMiPulse II. FPGA-based pulse programmer. Programming interface: TCP-IP. Fully integrated into SpecMan4EPR.
16384 delays with 4ns-316h duration, 16 outputs, 4 levels of nested cycles. External trigger. Zero service time cycles, exact sequence.
Built-in protection circuitry and programmable clock output.
Variety of front-ends.
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